There are a method of performing data transmission in parallel and a method of performing data transmission in series as examples of a method for data exchange between semiconductor chips.
In the case of performing data transmission in parallel, data transmission can be performed at high speed compared with the case of performing data transmission in series.
In addition, when performing data transmission in parallel, the data transmission can be performed at higher speed by increasing the bus width.
In the case of performing data transmission in parallel, however, the number of wiring lines in a semiconductor chip or the number of pins of a semiconductor chip is increased compared with the case of performing data transmission in series.
In addition, if the bus width is increased when performing data transmission in parallel, it becomes difficult to adjust the timing of transmission or reception of each bit of data transmitted in parallel (parallel data).
As described above, since the number of wiring lines in a semiconductor chip or the number of pins of a semiconductor chip is increased when performing data transmission in parallel, a method of performing data transmission in series is adopted when there are restrictions on the number of wiring lines in a semiconductor chip or the number of pins of a semiconductor chip.
Meanwhile, in the case of transmitting parallel data in series, it is necessary to perform P/S (Parallel/Serial) conversion for converting parallel data into serial data at the transmission side and to perform S/P (Serial/Parallel) conversion for converting data transmitted in series (serial data) into parallel data at the receiving side.
As a semiconductor chip which performs P/S conversion and S/P conversion, there is a semiconductor chip called a SERDES (Serializer/De-serializer) (for example, refer to NPL 1).
FIG. 1 is a block diagram showing an example of the configuration of an SERDES in the related art.
In FIG. 1, the SERDES has a serializer 10 and a de-serializer 20.
The serializer 10 has a bit converter 11, a P/S converter 12, a driver 13, and a pad.
For example, 8-bit parallel data is supplied from the high-order application (not shown) to the bit converter 11.
The bit converter 11 converts the 8-bit (width) parallel data from the high-order application into 10-bit parallel data in order to prevent 0 or 1 (low or high) from continuing for a long time in serial data and supplies the 10-bit parallel data to the P/S converter 12.
The P/S converter 12 converts the 10-bit parallel data from the bit converter 11 into serial data and supplies the serial data to the driver 13.
The driver 13 is driven according to the serial data from the P/S converter 12 and outputs a signal according to the serial data.
An output of the driver 13 is connected to a pad (electrode) 14, and the signal output from the driver 13 is output to the outside of the SERDES through the pad 14 and a wiring line provided in the pad 14.
The de-serializer 20 has a pad 21, a receiver 22, an equalizer 23, a CDR (Clock and Data Recovery) 24, an S/P converter 25, a word alignment section 26, and a bit converter 27.
A signal of serial data output from another SERDES is supplied to the receiver 22 through the pad 21, for example.
The receiver 22 receives the signal supplied through the pad 21 and supplies the signal to the equalizer 23.
The equalizer 23 equalizes the signal from the receiver 22 and supplies the result to the CDR 24.
The CDR 24 generates a clock from the signal supplied from the equalizer 23 and outputs the serial data to the S/P converter 25 according to the clock.
The S/P converter 25 converts the serial data from the CDR 24 into parallel data and supplies the parallel data to the word alignment section 26.
The word alignment section 26 performs word alignment of the parallel data from the S/P converter 25 and supplies to the bit converter 27 10-bit parallel data obtained as a result, for example.
The bit converter 27 converts the 10-bit parallel data from the word alignment section 26 into 8-bit parallel data by performing inverse conversion of the conversion of the bit converter 11 and supplies the 8-bit parallel data to the high-order application.
In recent years, however, the amount of data treated in the high-order application has increased, that is, the data transmission speed has increased.
In order to transmit the data at high speed, it is necessary to increase the operation speed of the SERDES.
However, if the operation speed of the SERDES is increased, attenuation of a signal in wiring lines extending from the pads 14 and 21 to the outside of the SERDES becomes large and the frequency band of a signal becomes wide. Accordingly, since (impedance) matching becomes difficult, reflection or radiation occurs easily.
In addition, in order to compensate for the attenuation of a signal or the like, it is necessary to provide the equalizer 23 in the SERDES.
Here, if the attenuation of a signal or the like is not large, it is not necessary to provide the equalizer 23 in the SERDES. However, in order to increase the operation speed of the SERDES, it is necessary to provide the equalizer 23 in the SERDES since the attenuation of a signal or the like becomes large.
In addition, in order to increase the operation speed of the SERDES, it is necessary to increase the operation speed of the P/S converter 12, the driver 13, the receiver 22, the CDR 24, and the S/P converter 25 which are a block for processing of serial data in the SERDES. In this case, however, power consumption of the block for processing of serial data is increased.
Therefore, the increase in the operation speed of the SERDES is restricted by electric power which can be supplied to the SERDES, and increasing the speed further is difficult.